Design Automation for Differential MOS Current-Mode Logic Circuits

Discusses various application areas where MCML implementation is essential in order to obtain superior circuit performance Offers detailed and clear analysis of MCML gates considering different performance parameters such as output drive capability, power dissipation, noise margin, and silicon area Describes top-down design methodology of creating a standard cell library in MCML containing detailed explanation of logic synthesis, MCML footprints, different standard cell layout techniques Provides step-by-step explanation of design automation methodology for differential circuits and its main differences compared to single ended CMOS design automation Includes four different design examples, using the presented design automation methodologies of MCML, with analysis of the performance of these examples and a comparison with CMOS implementations

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