GaN Transistor Modeling for RF and Power Electronics

GaN Transistor Modeling for RF and Power Electronics: Using The ASM-GaN-HEMT Model covers all aspects of characterization and modeling of GaN transistors for both RF and Power electronics applications. Chapters cover an in-depth analysis of the industry standard compact model ASM-HEMT for GaN transistors. The book details the core surface-potential calculations and a variety of real device effects, including trapping, self-heating, field plate effects, and more to replicate realistic device behavior. The authors also include chapters on step-by-step parameter extraction procedures for the ASM-HEMT model and benchmark test results. GaN is the fastest emerging technology for RF circuits as well as power electronics. This technology is going to grow at an exponential rate over the next decade. This book is envisioned to serve as an excellent reference for the emerging GaN technology, especially for circuit designers, materials science specialists, device engineers and academic researchers and students. - Provides an overview of the operation and physics of GaN-based transistors - Features in-depth description (by the developers of the model) of all aspects of the industry standard ASM-HEMT model for GaN circuits - Details parameter extraction of GaN devices and measurement data requirements for GaN model extraction

Yogesh Singh Chauhan is a Chair professor in the department of electrical engineering at Indian Institute of Technology Kanpur, India. He is the developer of several industry standard models: ASM-HEMT, BSIM-BULK (formerly BSIM6), BSIM-CMG, BSIM-IMG, BSIM4 and BSIM-SOI models. His research group is involved in developing compact models for GaN transistors, FinFET, Nanosheet/Gate-All-Around FETs, FDSOI transistors, Negative Capacitance FETs and 2D FETs. His research interests are RF characterization, modeling, and simulation of semiconductor devices. He is the Fellow of IEEE and Indian National Academy of Engineering. He is the Editor of IEEE Transactions on Electron Devices and Distinguished Lecturer of the IEEE Electron Devices Society. He is the chairperson of IEEE U.P. section and IEEE-EDS Compact Modeling Committee. He has published more than 400 papers in international journals and conferences. He received Ramanujan fellowship in 2012, IBM faculty award in 2013 and P. K. Kelkar fellowship in 2015, CNR Rao faculty award, Humboldt fellowship and Swarnajayanti fellowship in 2018. He has served in the technical program committees of IEEE International Electron Devices Meeting (IEDM), IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), IEEE European Solid-State Device Research Conference (ESSDERC), IEEE Electron Devices Technology and Manufacturing (EDTM), and IEEE International Conference on VLSI Design and International Conference on Embedded Systems.