Low Power Design with High-Level Power Estimation and Power-Aware Synthesis

This book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design.

Verwandte Artikel

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis Ahuja, Sumit, Shukla, Sandeep Kumar, Lakshminarayana, Avinash

106,99 €*

Weitere Produkte vom selben Autor

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis Ahuja, Sumit, Shukla, Sandeep Kumar, Lakshminarayana, Avinash

106,99 €*
SystemC Kernel Extensions for Heterogeneous System Modeling Shukla, Sandeep Kumar, Patel, Hiren

106,99 €*
SystemC Kernel Extensions for Heterogeneous System Modeling Shukla, Sandeep Kumar, Patel, Hiren

106,99 €*
Ingredients for Successful System Level Design Methodology Shukla, Sandeep Kumar, Patel, Hiren D.

106,99 €*