Static Timing Analysis for Nanometer Designs

Provides a reference for engineers in the field of static timing analysis for semiconductors Discusses the underlying theoretical background as well as in-depth coverage of timing verification using static timing analysis Covers topics such as CMOS logic gates, cell library, timing arcs, waveform slew, and cell capacitance, among others

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Static Timing Analysis for Nanometer Designs J. Bhasker, Rakesh Chadha

181,89 €*
Static Timing Analysis for Nanometer Designs Bhasker, J., Chadha, Rakesh

305,50 €*

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