Wafer Level 3-D ICs Process Technology
| Autor: | Chuan Seng Tan, Ronald J. Gutmann, L. Rafael Reif |
|---|---|
| EAN: | 9780387765341 |
| eBook Format: | |
| Sprache: | Englisch |
| Produktart: | eBook |
| Veröffentlichungsdatum: | 29.06.2009 |
| Kategorie: | |
| Schlagworte: | Applications enabled by 3-D integration CMOS Diffusion Technologie Three-dimensional (3-D) integration Through Silicon vias (TSVs) Wafer Wafer-Level 3-D Technology Platforms Wafer bonding circuit design integrated circuit silicon technol |
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This book focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses the technology platform for pre-packaging wafer lever 3-D ICs. However, this book does not include a detailed discussion of 3-D ICs design and 3-D packaging. This is an edited book based on chapters contributed by various experts in the field of wafer-level 3-D ICs process technology. They are from academia, research labs and industry.
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