Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs

Describes efficient procedures for hierarchical top-down design of pipeline converters Presents new methodologies to reduce bottom-up iterations, through inherent embedding of transistor-level parameters, such as parasitic capacitances, transconductances, and saturation currents Provides mathematical details of behavioral models, includes descriptions of the synthesis methods and associated tools and illustrates models through case studies supported by silicon prototypes Includes supplementary material: sn.pub/extras

Verwandte Artikel

Device-Level Modeling and Synthesis of High-Performance Pipeline Adcs Ruiz-Amaya, Jesús, Delgado-Restituto, Manuel, Rodríguez-Vázquez, Ángel

113,50 €*

Weitere Produkte vom selben Autor

Ultra Low Power Transceiver for Wireless Body Area Networks Delgado-Restituto, Manuel, Masuch, Jens

106,99 €*
Visual Inference for IoT Systems: A Practical Approach Velasco-Montero, Delia, Rodríguez-Vázquez, Angel, Fernández-Berni, Jorge

139,09 €*
Design of Event-Driven SPAD-Based 3D Image Sensors Rodriguez-Vazquez, Angel, Lenero-Bardallo, Juan Antonio, Gomez-Merchan, Ruben

140,50 €*
Top-Down Design of High-Performance Sigma-Delta Modulators Medeiro, Fernando, Rodríguez-Vázquez, Angel, Pérez Verdú, Belén

160,49 €*